From fe1c2c9b8ec138076ee7cb2b4611667c5c895000 Mon Sep 17 00:00:00 2001
From: LongHairedHacker <sebastian@sebastians-site.de>
Date: Sat, 24 May 2014 22:31:38 +0200
Subject: [PATCH] Added devicetree overlay

---
 beaglebone/BB-HEPTALED-00A0.dts | 68 +++++++++++++++++++++++++++++++++
 beaglebone/spitest.py           | 17 +++++++++
 2 files changed, 85 insertions(+)
 create mode 100644 beaglebone/BB-HEPTALED-00A0.dts
 create mode 100644 beaglebone/spitest.py

diff --git a/beaglebone/BB-HEPTALED-00A0.dts b/beaglebone/BB-HEPTALED-00A0.dts
new file mode 100644
index 0000000..52b2b26
--- /dev/null
+++ b/beaglebone/BB-HEPTALED-00A0.dts
@@ -0,0 +1,68 @@
+/*
+ * Copyright (C) 2013 CircuitCo
+ *
+ * Virtual cape for SPI0 on connector pins P9.22 P9.21 P9.18 P9.17
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "ti,beaglebone", "ti,beaglebone-black";
+
+	/* identification */
+	part-number = "BB-HEPTALED";
+	version = "00A0";
+
+	/* state the resources this cape uses */
+	exclusive-use =
+		/* the pin header uses */
+		"P9.17",	/* spi0_cs0 */
+		"P9.18",	/* spi0_d1 */
+		"P9.21",	/* spi0_d0 */
+		"P9.22",	/* spi0_sclk */
+		/* the hardware ip uses */
+		"spi0";
+
+	fragment@0 {
+		target = <&am33xx_pinmux>;
+		__overlay__ {
+			/* default state has all gpios released and mode set to uart1 */
+			bb_spi0_pins: pinmux_bb_spi0_pins {
+				pinctrl-single,pins = <
+					0x150 0x30	/* spi0_sclk.spi0_sclk, INPUT_PULLUP | MODE0 */
+					0x154 0x30	/* spi0_d0.spi0_d0, INPUT_PULLUP | MODE0 */
+					0x158 0x10	/* spi0_d1.spi0_d1, OUTPUT_PULLUP | MODE0 */
+					0x15c 0x10	/* spi0_cs0.spi0_cs0, OUTPUT_PULLUP | MODE0 */
+				>;
+			};
+		};
+	};
+
+	fragment@1 {
+		target = <&spi0>;	/* spi0 is numbered correctly */
+		__overlay__ {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			status = "okay";
+			pinctrl-names = "default";
+			pinctrl-0 = <&bb_spi0_pins>;
+
+
+			channel@0 {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				compatible = "spidev";
+
+				reg = <0>;
+				spi-max-frequency = <16000000>;
+				spi-cpha;
+			};
+		};
+	};
+};
diff --git a/beaglebone/spitest.py b/beaglebone/spitest.py
new file mode 100644
index 0000000..0d4ed84
--- /dev/null
+++ b/beaglebone/spitest.py
@@ -0,0 +1,17 @@
+import spidev
+import time
+spi = spidev.SpiDev()
+# create spi object
+spi.open(1,0)
+# open spi port 1, device (CS) 0
+try:
+	while True:
+		resp = spi.xfer2([0xAA])
+		# transfer one byte
+		time.sleep(0.1)
+		# sleep for 0.1 seconds
+
+except KeyboardInterrupt:
+	# Ctrl+C pressed, so...
+	spi.close()
+