Added code that fails sometimes
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commit
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[build]
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rustc = "hcl/rustc-wrapper"
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target remote :3333
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monitor arm semihosting enable
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load
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tbreak run
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monitor reset halt
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continue
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#source .gdbdash
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/target
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**/*.rs.bk
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[submodule "hcl"]
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path = hcl
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url = https://git.eno.space/hcl.git
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[[package]]
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name = "hcl"
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version = "0.0.0"
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dependencies = [
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"platform_def 0.1.0",
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]
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[[package]]
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name = "hclnom"
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version = "3.2.1"
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dependencies = [
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"memchr 1.0.2 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "libc"
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version = "0.2.43"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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[[package]]
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name = "memchr"
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version = "1.0.2"
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source = "registry+https://github.com/rust-lang/crates.io-index"
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dependencies = [
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"libc 0.2.43 (registry+https://github.com/rust-lang/crates.io-index)",
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]
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[[package]]
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name = "platform_def"
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version = "0.1.0"
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dependencies = [
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"hclnom 3.2.1",
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]
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[[package]]
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name = "spi-test"
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version = "0.1.0"
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dependencies = [
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"hcl 0.0.0",
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]
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[metadata]
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"checksum libc 0.2.43 (registry+https://github.com/rust-lang/crates.io-index)" = "76e3a3ef172f1a0b9a9ff0dd1491ae5e6c948b94479a3021819ba7d860c8645d"
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"checksum memchr 1.0.2 (registry+https://github.com/rust-lang/crates.io-index)" = "148fab2e51b4f1cfc66da2a7c32981d1d3c083a803978268bb11fe4b86925e7a"
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[package]
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name = "spi-test"
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version = "0.1.0"
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authors = ["LongHairedHacker <sebastian@sebastians-site.de>"]
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[dependencies]
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hcl = { path = "hcl", features = ["stm32f103:b"] }
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[profile.dev]
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opt-level = 2
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debug = 2
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lto = true
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incremental = false
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[profile.release]
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opt-level = 3
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lto = true
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incremental = false
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fn main() {
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println!("cargo:rustc-env=HCL_FIXUP_ARGS=1");
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}
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Subproject commit 9dc33a9abadbde8e0c2ffc853a35feaf6990c143
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#!/bin/bash
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openocd -f interface/stlink-v2.cfg -f target/stm32f1x.cfg
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#!/bin/bash
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cargo build --target=thumbv7m-none-eabi || exit -1
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arm-none-eabi-gdb target/thumbv7m-none-eabi/debug/spi-test
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#![no_std]
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#![feature(asm, used, const_fn, naked_functions, alloc, box_syntax)]
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#![no_main]
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#![feature(extern_prelude)]
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#[macro_use]
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extern crate hcl;
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#[macro_use]
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extern crate alloc;
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use core::mem;
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use hcl::platform::gpio;
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use hcl::platform::rcc;
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use hcl::platform::scs;
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use hcl::platform::PeripheralRef;
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use hcl::platform::Location;
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use hcl::platform::spi;
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fn configure_clocks(rcc: &mut rcc::RCC) {
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rcc.clock_control.set_hse_on(true);
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while !rcc.clock_control.hse_ready() {}
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rcc.clock_config
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.configure(|c| {
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c.set_pll_multiplier(10)
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.set_pll_source(rcc::PllSource::HsiDiv2)
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});
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rcc.clock_control.set_pll_on(true);
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while !rcc.clock_control.pll_ready() {}
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rcc.clock_config
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.switch_clock_source(rcc::SystemClockSource::Pll);
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}
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fn configure_peripherals(rcc: &mut hcl::platform::rcc::RCC,
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gpio_a: &mut gpio::GPIO,
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gpio_c: &mut gpio::GPIO) {
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rcc.apb2_enable
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.configure(|a| a.set_gpio_a(true).set_gpio_c(true).set_spi1(true));
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gpio_a.configure(|g| {
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g.set_mode(2, gpio::PinMode::Output50MHz)
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.set_output_config(2, gpio::OutputConfig::AfPushPull)
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.set_mode(3, gpio::PinMode::Output50MHz)
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.set_output_config(3, gpio::OutputConfig::AfPushPull)
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// SCK1
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.set_mode(5, gpio::PinMode::Output50MHz)
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.set_output_config(5, gpio::OutputConfig::AfPushPull)
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// MOSI1
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.set_mode(7, gpio::PinMode::Output50MHz)
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.set_output_config(7, gpio::OutputConfig::AfPushPull)
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// MISO1
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.set_mode(6, gpio::PinMode::Input)
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.set_input_config(6, gpio::InputConfig::PullUpDown)
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// ST7735 cs pin
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.set_mode(0, gpio::PinMode::Output50MHz)
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.set_output_config(0, gpio::OutputConfig::PushPull)
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});
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gpio_c.configure(|g| {
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g.set_mode(13, gpio::PinMode::Output50MHz)
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.set_output_config(13, gpio::OutputConfig::PushPull)
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});
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}
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fn write_byte<SPIAddr>(spi : &mut PeripheralRef<spi::SPI, SPIAddr>, byte : u8)
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where SPIAddr: Location {
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spi.set_data(byte as u32);
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while !spi.tx_buffer_empty() {};
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while spi.busy() {};
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}
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const LOGO_PX: [u16; 11] =
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[0x4081, 0x4880, 0x4880, 0x2861, 0x38c1, 0x38c1, 0x30a1, 0x3081, 0x2861, 0x1861, 0x1061];
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// allowing inlining into main() breaks the stack, since main() must be naked to set up a process stack.
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#[inline(never)]
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fn run(mut scs: scs::Instance, mut p: hcl::platform::Instance) {
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configure_clocks(&mut p.rcc);
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configure_peripherals(&mut p.rcc, &mut p.gpio_a, &mut p.gpio_c);
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let mut spi = p.spi1;
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let mut gpio = p.gpio_a;
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spi.configure(|s| {
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s.set_master_mode(true)
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.set_software_slave_select(true)
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.set_clock_divider(8)
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// required for master mode, even if ss is done manually
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.set_slave_select_output_enabled(true)
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.set_enabled(true)
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});
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gpio.set_bit(0);
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loop {
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for i in 0..11 {
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let word = LOGO_PX[i];
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let data0 = (word >> 8) as u8;
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let data1 = (word & 0xFF) as u8;
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gpio.reset_bit(0);
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write_byte(&mut spi, data0);
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write_byte(&mut spi, data1);
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gpio.set_bit(0);
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}
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}
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}
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entry_point!(main);
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fn main(scs: scs::Instance, p: hcl::platform::Instance) {
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declare_thread_stack!(stack, 3072);
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unsafe {
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hcl::set_process_stack(&stack);
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hcl::use_process_stack(true);
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}
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run(scs, p);
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}
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